07KR264 VMEbus Initiator/DMA Capabilities: The supports DMA operations. The DMA sequence is initialized by control register writes to the by the host. Therefore, the becomes a VMEbus initiator and moves the specified block of data up to 64 Mbyte without further host intervention. The architecture ensures that the does not monopolize the VMEbus and causes the ’s DMA engine to automatically split large blocks in small bursts. The can be programmed to issue a VMEbus interrupt upon completion of DMA process. There are two independent DMA engines, each capable of reading or writing. It is possible for a read DMA and a write DMA to occur simultaneously. Error Management: Errors are detected by the with the use of the error detection facilities of the Fiber Channel encoder/decoder and additional cyclic redundant encoding and checking. When a node detects an error, the erroneous transfer is removed from the system and an interrupt is generated, if enabled. Protection Against Lost Data: The product is designed to prevent the FIFOs from becoming full and overflowing. It is important to note the only way that data can start to accumulate in FIFOs is for data to enter the node at a rate greater than the network data rate. Since data can enter from the fiber and from the VMEbus, it is possible to exceed these rates. If the transmit FIFO becomes almost full, a bit in the Status Register is set. This is an indication to the node’s software that subsequent WRITEs to the Reflective Memory should be suspended until the FIFO is less than half-full. Once the transmit FIFO is almost full, writes to the Reflective Memory will be acknowledged with an interrupt. No data will be lost. If the receive FIFO is allowed to become almost full, there is a danger the receiver FIFO can overflow resulting in data loss. In order to prevent this situation, the board will not respond to Read or Write commands which if occurs for a long period of time will cause the system controller to declare a time out. Redundant Transfer Mode: The can optionally be placed in the redundant transfer mode by the removal of a board jumper shunt. While in the redundant transfer mode, each packet sent on the network by the transmitter is sent twice, regardless of the dynamic packet size. The receiving circuitry of each node on the network evaluates each of the redundant transfers. If no errors are detected in the first transfer, it is used to update the onboard memory and the second transfer is discarded. If, however, the first transfer does contain an error, the second transfer is used to update the onboard memory provided it has no transmission error. In the remote chance that both redundant transfers contain an error, both transfer is used and the data is completely removed from the network. The redundant transfer mode greatly reduces the chance that any data is dropped from the network. However, the redundant transfer mode also reduces the effective network transfer rates. The single Lword (4 byte) transfer rate drops to approximately 20 Mbyte/s. The 16 Lword (64 byte) transfer rate drops to the redundant rate of 87 Mbyte/s. Network Monitor: There is a bit in the Status Register that can be used to verify that data is traversing the ring (that is, the ring is not broken). This can also be used to measure network latency. VMISFT-RFM2G Network and Shared Memory Driver: The VMISFT-RFM2G network and shared memory driver provides an applications program with three convenient methods for exchanging data among hosts connected to the same RFM network: 1) Programmed I/O (Peek and Poke): An applications program can treat the memory on the RFM device as ordinary memory in which the program can use ordinary load and store accesses. 2) Direct Memory Access (DMA): Systems where the performance penalty for individual bus accesses is unacceptably high, the driver utilizes the DMA feature available on some RFM devices in order to transfer data in variable-sized blocks. On UNIX systems, an applications program uses the familiar 1seek(2)/read(2)/write(2) system calls to perform the data movement, while on other operating systems a GE Fanuc Embedded Systems-provided application program interface (API) is used for data movement. 3) User Interrupts: The VMIPCI-5565 provides three network interrupts. Any processor can generate an interrupt on any other node on the network. In addition, any processor can generate an interrupt on all nodes on the network with a single register write. Technical Specifications Memory Size: 64 or 128 Mbyte Network Nonredundant Transfer Rate: 43 Mbyte/s (single longword accesses) to 174 Mbyte/s (64 byte bursts) Network Redundant Transfer Rate: 20 Mbyte/s (single longword accesses) to 87 Mbyte/s (64 byte bursts) Compatibility VMEbus: This product complies with the VMEbus specification (ANSI/IEEE STD 1014-1987, IEC 821 and 297), with the following mnemonics: A32:A24:D32/D16/D08 (EO): Slave: 39/3D:09/0D Form factor: 6U Cables Multimode Fiber Cable: Small form factor (SFF) 850nm, 970 ft, multimode LC connector Single Mode: Small form factor (SFF) 1,300nm, single mode, 10km or 6.21 miles 3 | 
