




1X00474G04
40针平面接头允许选择P2选项。已安装跳线
跨行A引脚3-10和行B引脚3-20启用前端以太网接入。
跨B行针脚3-10和C行针脚3至10安装的跳线启用P2
(后)千兆以太网。只有在启用前端以太网时
跨接器安装在引脚1-10上的C行和D行,以启用P2
(后)PMC输入/输出。请注意,所有跳线必须跨接在同一导线上
两行(全部在A行和B行之间和/或C行和D行之间,或全部
在行B和行C之间)。
J10
1.
2.
3.
PMC模式的PMC1 P2 I/O
J16
1.
2.
3.
J15
1.
2.
3.
J17
1.
2.
3.
J18
1.
2.
3.
J25
1.
2.
3.
J26
1.
2.
3.
J27
1.
2.
3.
J28
1.
2.
3.
J10
1.
2.
3.
IPMC模式的IPMC P2 I/O
J16
1.
2.
3.
J15
1.
2.
3.
J17
1.
2.
3.
J18
1.
2.
3.
J25
1.
2.
3.
J26
1.
2.
3.
J27
1.
2.
3.
J28
1.
2.
3.
(出厂配置)
1-10计算机组文献中心网站
硬件准备和安装1
下图显示了J30的跳线设置选项
适用时显示出厂默认值:
请参阅前/后以太网和转换模块选项标题(J30)
参见第5-29页的连接器引脚分配。
SROM配置开关(S3)
作为8位SMT开关的一部分,S3启用/禁用MV64360
SROM初始化和所有I2C EEPROM写保护。
SROM Init开关关闭以禁用MV64360设备
通过I2C SROM初始化。开关接通以启用此序列。
SROM WP开关关闭,以在所有I2C上启用写保护。这个
开关接通以禁用I2
C EEPROM写保护。
4294 0604
1.
11
21
31
10
20
30
40
前端以太网
(默认)
1.
11
21
31
10
20
30
40
后以太网
1.
11
21
31
10
20
30
40
非特定转换模块
(默认)
1.
11
21
31
10
20
30
40
至P2的PMC I/O
(默认)
1.
11
21
31
10
20
30
40
MVME 712M
转换模块
1.
11
21
31
10
20
30
40
MVME 761
转换模块
J30选项
表1-3.SROM配置开关(S3)
立场2 1
函数SROM WP SROM_INIT
默认(关闭)WP无SROM_INIT
闪存启动存储体选择配置开关(S4)
http://www.motorola.com/computer/literature 1-11
1.
S3位置3-8定义了如果MVME6100
安装在3排背板中。以下是引脚:
将单个位置设置为“开”将强制相应的信号:
零如果板安装在5排背板中,则地理位置
地址由背板定义,应设置S3的位置3-8
设置为关闭。默认设置为关闭。
闪存启动存储体选择配置开关(S4)
4位SMT配置开关位于板上,用于控制
闪存组B启动块写保护和闪存组A写保护。
选择闪存启动组和编程/安全启动环境设置。
注意:建议始终启用存储体B写保护。
存储体B启动WP开关断开,表示闪存存储体A启动
块是写保护的。该开关打开表示无写保护
1X00474G04

1X00474G04
A 40-pin planar header allows for selecting P2 options. Jumpers installed across Row A pins 3-10 and Row B pins 3-10 enable front Ethernet access. Jumpers installed across Row B pins 3-10 and Row C pins 3-10 enable P2 (rear) Gigabit Ethernet. Only when front Ethernet is enabled can the jumpers be installed across Row C and Row D on pins 1-10 to enable P2 (rear) PMC I/O. Note that all jumpers must be installed across the same two rows (all between Row A and Row B and/or Row C and Row D, or all between Row B and Row C). J10 1 2 3 PMC1 P2 I/O for PMC Mode J16 1 2 3 J15 1 2 3 J17 1 2 3 J18 1 2 3 J25 1 2 3 J26 1 2 3 J27 1 2 3 J28 1 2 3 J10 1 2 3 IPMC P2 I/O for IPMC Mode J16 1 2 3 J15 1 2 3 J17 1 2 3 J18 1 2 3 J25 1 2 3 J26 1 2 3 J27 1 2 3 J28 1 2 3 (factory configuration) 1-10 Computer Group Literature Center Web Site Hardware Preparation and Installation 1 The following illustration shows jumper setting options for J30. The factory default is shown where applicable: Refer to Front/Rear Ethernet and Transition Module Options Header (J30) on page 5-29 for connector pin assignments. SROM Configuration Switch (S3) A part of the 8-position SMT switch, S3 enables/disables the MV64360 SROM initialization and all I2C EEPROM write protection. The SROM Init switch is OFF to disable the MV64360 device initialization via the I2C SROM. The switch is ON to enable this sequence. The SROM WP switch is OFF to enable write protection on all I2C. The switch is ON to disable the I2 C EEPROM write protection. 4294 0604 1 11 21 31 10 20 30 40 Front Ethernet (Default) 1 11 21 31 10 20 30 40 Rear Ethernet 1 11 21 31 10 20 30 40 Non-Specific Transition Module (Default) 1 11 21 31 10 20 30 40 PMC I/O TO P2 (Default) 1 11 21 31 10 20 30 40 MVME 712M Transition Module 1 11 21 31 10 20 30 40 MVME 761 Transition Module J30 Options Table 1-3. SROM Configuration Switch (S3) POSITION 2 1 FUNCTION SROM WP SROM_INIT DEFAULT (OFF) WP No SROM_INIT Flash Boot Bank Select Configuration Switch (S4) http://www.motorola.com/computer/literature 1-11 1 S3 position 3-8 defines the VME Geographical Address if the MVME6100 is installed in a 3-row backplane. The following is the pinout: Setting the individual position to ON forces the corresponding signal to zero. If the board is installed in a 5-row backplane, the geographical address is defined by the backplane and positions 3-8 of S3 should be set to OFF. The default setting is OFF. Flash Boot Bank Select Configuration Switch (S4) A 4-position SMT configuration switch is located on the board to control Flash Bank B Boot block write-protect and Flash Bank A write-protect. Select the Flash Boot bank and the programmed/safe start ENV settings. Note It is recommended that Bank B Write Protect always be enabled. The Bank B Boot WP switch is OFF to indicate that the Flash Bank B Boot block is write-protected. The switch is ON to indicate no write-protection
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