MSK030C-0900-NN-M1-UG0-NNNN R911308683模块现货

MSK030C-0900-NN-M1-UG0-NNNN R911308683

I/O设备可以连接到上的串行端口1（或2）
MVME162或MVME712上的串行端口2（或4），但不
二者都（即，如果I/O设备连接到MVME162
端口1，不应连接其他I/O设备
MVME712端口2；它们在功能上是相同的端口。）
一般说明
MVME162/D2 1-7
1.
VMEbus接口
可选的VMEchip2 ASIC是MVME162的VMEbus接口。
（此选项是出厂版本，不能添加到字段中。）VMEchip2
功能包括：
❏ 两个可编程32位滴答定时器
❏ 可编程看门狗定时器
❏ 用于主接口和从接口的可编程地图解码器
❏ 到/来自本地总线DMA控制器的VMEbus
❏ VMEbus到/来自本地总线的非DMA编程访问接口
❏ VMEbus中断器
❏ VMEbus系统控制器
❏ VMEbus中断处理程序
❏ VMEbus请求程序
处理器到VMEbus的传输可以是D8、D16或D32。VMEchip2 DMA
然而，到VMEbus的传输可以是D16、D32、D16/BLT、D32/BLT或
D64/MBLT。
无VMEbus接口选项
如果需要，MVME162可以用作嵌入式控制器，而无需
VMEbus接口（即，没有可选的VMEchip2）。联系当地人
摩托罗拉销售办事处获取订购信息。
麦奇普
存储器控制器（MCchip）ASIC提供四个32位可编程
滴答定时器和到LAN芯片、SCSI芯片、串行端口芯片的接口，
BBRAM、PROM/闪存、SRAM、DRAM、复位控制、看门狗定时器、访问
定时器和中断逻辑。
闪存和EPROM
MVME162配备1MB闪存和EPROM插座
准备安装EPROM，可单独订购。
快闪存储器是以1Mbit x 8配置组织的单个设备
或以256Kbit x 8配置组织的四个设备。EPROM位置
是一种标准的JEDEC 32引脚PLCC，能够实现4 Mbit密度（128kbit x 8；
一般资料
1-8 MVME162嵌入式控制器用户手册
1.
256kbit x 8；512kbit x 8；1Mbit x 8）组织为512Kbit x 8设备。A.
跳线允许从闪存或从
EPROM。
IndustryPack模块
MVME162上多可安装四个IndustryPack（IP）模块
IPs和MVME162之间的接口为IndustryPack接口
控制器（IPIC）ASIC。通过四个3M连接器提供对IPs的访问
位于MVME162前面板后面。
可选SCSI接口
NCR 53C710协处理器为MVME162提供SCSI接口。
可选LAN以太网收发器接口
Intel 82596CA控制器提供LAN以太网收发器接口
对于MVME162。
所需设备
完成MVME162系统需要以下设备：
❏ 系统控制台终端
❏ 磁盘驱动器和控制器
❏ 操作系统

MSK030C-0900-NN-M1-UG0-NNNN R911308683

MSK030C-0900-NN-M1-UG0-NNNN R911308683

An I/O device may be connected to serial port 1 (or 2) on the
MVME162 or to serial port 2 (or 4) on the MVME712, but not
both. (That is, if an I/O device is connected to MVME162
port 1, no other I/O device should be connected to
MVME712 port 2; they are functionally the same port.)
General Description
MVME162/D2 1-7
1
VMEbus Interface
The optional VMEchip2 ASIC is the VMEbus interface for the MVME162.
(This option is a factory build and cannot be added in the field.) VMEchip2
features include:
❏ Two programmable 32-bit tick timers
❏ A programmable watchdog timer
❏ Programmable map decoders for the master and slave interfaces
❏ A VMEbus to/from local bus DMA controller
❏ A VMEbus to/from local bus non-DMA programmed access interface
❏ A VMEbus interrupter
❏ A VMEbus system controller
❏ A VMEbus interrupt handler
❏ A VMEbus requester
Processor-to-VMEbus transfers can be D8, D16, or D32. VMEchip2 DMA
transfers to the VMEbus, however, can be D16, D32, D16/BLT, D32/BLT, or
D64/MBLT.
No-VMEbus-Interface Option
If desired, the MVME162 can function as an embedded controller without a
VMEbus interface (i.e., without the optional VMEchip2). Contact your local
Motorola sales office for ordering information.
MCchip
The Memory Controller (MCchip) ASIC provides four 32-bit programmable
tick timers and an interface to the LAN chip, SCSI chip, serial port chip,
BBRAM, PROM/Flash, SRAM, DRAM, reset control, watchdog timers, access
timers, and interrupter logic.
Flash Memory and EPROM
The MVME162 is equipped with 1MB of Flash memory and an EPROM socket
ready for the installation of the EPROM, which may be ordered separately.
Flash memory is either a single device organized in a 1Mbit x 8 configuration
or four devices organized in a 256Kbit x 8 configuration. The EPROM location
is a standard JEDEC 32-pin PLCC capable of four Mbit densities (128 Kbit x 8; 
General Information
1-8 MVME162 Embedded Controller User’s Manual
1
256 Kbit x 8; 512 Kbit x 8; 1 Mbit x 8) organized as a 512Kbit x 8 device. A
jumper allows reset code to be fetched either from Flash memory or from the
EPROM.
IndustryPack Modules
Up to four IndustryPack (IP) modules may be installed on the MVME162. The
interface between the IPs and MVME162 is the IndustryPack Interface
Controller (IPIC) ASIC. Access to the IPs is provided by four 3M connectors
located behind the MVME162 front panel.
Optional SCSI Interface
An NCR 53C710 coprocessor provides the SCSI interface for the MVME162.
Optional LAN Ethernet Transceiver Interface
An Intel 82596CA controller provides the LAN Ethernet transceiver interface
for the MVME162.
Required Equipment
The following equipment is required to complete an MVME162 system:
❏ System console terminal
❏ Disk drives and controllers
❏ Operating system