ALCL-14-5 用于DCS系统高压变频器主板控制电压稳定

ALCL-14-5 用于DCS系统高压变频器主板控制电压稳定 

CMOS和JFET输入放大器在低频时的输入阻抗超过几GΩs。然而，在
在较高频率下，晶体管对漏极、源极和衬底的寄生电容降低了
阻抗。低频时的高阻抗消除了任何偏置电流和相关的散粒噪声。在
频率越高，输入电流噪声越大（见图53），这是由于
CMOS栅极氧化物和下面的晶体管沟道。这种现象是
晶体管的结构是不可避免的。
图53.输入电流噪声（IBN和IBI）与频率
断电电压（V）
静态电流（mA）
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
0
5.
10
15
20
25
D200
TA=-40qC
TA=25qC
TA=125qC
断电电压（V）
静态电流（mA）
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
0
5.
10
15
20
25
D201
TA=-40qC
TA=25qC
TA=125qC
19
OPA858
www.ti.com.SBOS629A–2018年4月–2018年7月修订
产品文件夹链接：OPA858
版权所有©2018，德克萨斯仪器公司提交文件反馈
9.4设备功能模式
9.4.1分供和单供运行
OPA858可配置单面电源或分体式电源，如图63所示。分体式电源
使用输入共模设置为接地的平衡电源的操作简化了实验室测试，因为大多数
信号发生器、网络分析仪、频谱分析仪和其他实验室设备通常参考输入和
输出接地。在信号绕地摆动的系统中，分路供电操作是优选的。
然而，该系统需要两个供电轨。在分路供电操作中，热垫必须连接到
负电源。
较新的系统使用单个电源来提高效率并降低额外电源的成本。
OPA858可与单个正电源（接地负电源）一起使用，无需改变
如果输入共模和输出摆幅在设备的线性操作中偏置，则性能。到
将电路从分体式电源更改为单电源配置，将所有电压电平移动一半
电源导轨之间的差异。在这种情况下，热垫必须接地。
9.4.2断电模式
OPA858具有断电模式，以减少静态电流以节省功率。图23和
图24显示了当PD引脚在禁用和启用之间切换时，OPA858的瞬态响应
美国。
PD禁用和启用阈值电压参考负电源。如果放大器是
配置3.3 V的正电源和接地的负电源，然后禁用和启用
阈值电压分别为0.65V和1.8V。如果放大器配置有±1.65 V电源，则
禁用和启用阈值电压分别为-1 V和0.15 V。如果放大器配置为：
±2.5-V电源，则阈值电压为-1.85 V和-0.7 V。
图54显示了当PD引脚从启用状态向下扫描时，典型放大器的开关行为
变为禁用状态。类似地，图55显示了典型放大器的开关行为，如PD引脚所示
从禁用状态向上扫描到启用状态。之间切换阈值的微小差异
下扫和上扫是由于放大器中设计的滞后，以增加其抗干扰性
PD引脚上的噪声

ALCL-14-5 用于DCS系统高压变频器主板控制电压稳定 

ALCL-14-5 用于DCS系统高压变频器主板控制电压稳定 

The input impedance of CMOS and JFET input amplifiers at low frequencies exceed several GΩs. However, at
higher frequencies, the transistors parasitic capacitance to the drain, source, and substrate reduces the
impedance. The high impedance at low frequencies eliminates any bias current and the associated shot noise. At
higher frequencies, the input current noise increases (see Figure 53) as a result of capacitive coupling between
the CMOS gate oxide and the underlying transistor channel. This phenomenon is a natural artifact of the
construction of the transistor and is unavoidable.
Figure 53. Input Current Noise (IBN and IBI) vs Frequency
Power Down Voltage (V)
Quiescent Current (mA)
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
0
5
10
15
20
25
D200
TA = -40qC
TA = 25qC
TA = 125qC
Power Down Voltage (V)
Quiescent Current (mA)
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
0
5
10
15
20
25
D201
TA = -40qC
TA = 25qC
TA = 125qC
19
OPA858
www.ti.com SBOS629A –APRIL 2018–REVISED JULY 2018
Product Folder Links: OPA858
Copyright © 2018, Texas Instruments Incorporated Submit Documentation Feedback
9.4 Device Functional Modes
9.4.1 Split-Supply and Single-Supply Operation
The OPA858 can be configured with single-sided supplies or split-supplies as shown in Figure 63. Split-supply
operation using balanced supplies with the input common-mode set to ground eases lab testing because most
signal generators, network analyzers, spectrum analyzers, and other lab equipment typically reference inputs and
outputs to ground. Split-supply operation is preferred in systems where the signals swing around ground.
However, the system requires two supply rails. In split-supply operation, the thermal pad must be connected to
the negative supply.
Newer systems use a single power supply to improve efficiency and reduce the cost of the extra power supply.
The OPA858 can be used with a single positive supply (negative supply at ground) with no change in
performance if the input common-mode and output swing are biased within the linear operation of the device. To
change the circuit from a split-supply to a single-supply configuration, level shift all the voltages by half the
difference between the power supply rails. In this case, the thermal pad must be connected to ground.
9.4.2 Power-Down Mode
The OPA858 features a power-down mode to reduce the quiescent current to conserve power. Figure 23 and
Figure 24 show the transient response of the OPA858 as the PD pin toggles between the disabled and enabled
states.
The PD disable and enable threshold voltages are with reference to the negative supply. If the amplifier is
configured with the positive supply at 3.3 V and the negative supply at ground, then the disable and enable
threshold voltages are 0.65 V and 1.8 V, respectively. If the amplifier is configured with ±1.65-V supplies, then
the disable and enable threshold voltages are at –1 V and 0.15 V, respectively. If the amplifier is configured with
±2.5-V supplies, then the threshold voltages are at –1.85 V and –0.7 V.
Figure 54 shows the switching behavior of a typical amplifier as the PD pin is swept down from the enabled state
to the disabled state. Similarly Figure 55 shows the switching behavior of a typical amplifier as the PD pin is
swept up from the disabled state to the enabled state. The small difference in the switching thresholds between
the down sweep and the up sweep is due to the hysteresis designed into the amplifier to increase its immunity to
noise on the PD pin