








6227BZ10100C AA P191096 自动化控制PC板用于自能数字输出
雪崩光电二极管(APD)和放大器之间的电感。始终将光电二极管置于
PCB与放大器的同一侧。将放大器和APD放置在PCB的相对侧
增加了通孔电感引起的寄生效应。APD包装可能相当大,通常需要
将APD放置得比理想的离放大器更远。两个设备之间的附加距离会导致:
如图65所示,APD和运算放大器反馈网络之间的电感增加
电感不利于失补偿放大器的稳定性,因为它将APD电容与
噪声增益传递函数。噪声增益由等式4给出。在
反馈网络增加等式4中的分母,从而降低噪声增益和相位
边缘如果在TO can中使用带引线的APD,则应通过切割
TO的引线应尽可能短。
图65所示的布局可以通过遵循图66所示的一些准则来改进
需要遵循的主要规则是:
•尽可能靠近放大器的反相输入端添加隔离电阻器RISO。选择的值
RISO应在10Ω和20Ω之间。电阻器抑制由迹线引起的潜在共振
电感和放大器内部电容。
•尽可能靠近APD引脚关闭反馈元件(RF和CF)和RISO之间的回路。
这确保了更平衡的布局,并减少了APD和反馈之间的电感隔离
网络
哪里
•ZF是反馈网络的总阻抗。
•ZIN是输入网络的总阻抗。(4)
图65.非理想TIA布局图66.改进的TIA布局
27
OPA858
www.ti.com.SBOS629A–2018年4月–2018年7月修订
产品文件夹链接:OPA858
版权所有©2018,德克萨斯仪器公司提交文件反馈
13设备和文档支持
13.1接收文件更新通知
要接收文档更新通知,请导航到ti.com上的设备产品文件夹。在上面
在右角,单击“提醒我”注册并接收任何产品信息的每周摘要
改变。有关更改详细信息,请查看任何修订文件中包含的修订历史记录。
13.2社区资源
以下链接连接到TI社区资源。链接内容由各自的
贡献者。它们不构成TI规范,也不一定反映TI的观点;参见TI的条款
使用
钛E2E™ 在线社区TI的工程师对工程师(E2E)社区。旨在促进合作
在工程师中。在e2e.ti.com,您可以提问、分享知识、探索想法和帮助
与其他工程师一起解决问题。
设计支持:TI的设计支持快速找到有用的E2E论坛以及设计支持工具和
技术支持的联系信息。
13.3商标
E2E是德州仪器的商标。
是~微软公司的商标。
13.4静电放电注意事项
该集成电路可能被ESD损坏。Texas Instruments建议处理所有集成电路
适当的预防措施。不遵守正确的搬运和安装程序可能导致损坏。
ESD损坏范围从细微的性能退化到完全的设备故障。精密集成电路可能更多
容易损坏,因为非常小的参数变化可能导致设备不符合其公布的规范。
6227BZ10100C AA P191096 自动化控制PC板用于自能数字输出

6227BZ10100C AA P191096 自动化控制PC板用于自能数字输出
inductance between the avalanche photodiode (APD) and the amplifier. Always place the photodiode on the
same side of the PCB as the amplifier. Placing the amplifier and the APD on opposite sides of the PCB
increases the parasitic effects due to via inductance. APD packaging can be quite large which often requires the
APD to be placed further away from the amplifier than ideal. The added distance between the two device results
in increased inductance between the APD and op amp feedback network as shown in Figure 65. The added
inductance is detrimental to a decompensated amplifiers stability since it isolates the APD capacitance from the
noise gain transfer function. The noise gain is given by Equation 4. The added PCB trace inductance between
the feedback network increases the denominator in Equation 4 thereby reducing the noise gain and the phase
margin. In cases where a leaded APD in a TO can is used inductance should be further minimized by cutting the
leads of the TO can as short as possible.
The layout shown in Figure 65 can be improved by following some of the guidelines shown in Figure 66. The two
key rules to follow are:
• Add an isolation resistor RISO as close as possible to the inverting input of the amplifier. Select the value of
RISO to be between 10 Ω and 20 Ω. The resistor dampens the potential resonance caused by the trace
inductance and the amplifiers internal capacitance.
• Close the loop between the feedback elements (RF and CF) and RISO as close to the APD pins as possible.
This ensures a more balanced layout and reduces the inductive isolation between the APD and the feedback
network.
where
• ZF is the total impedance of the feedback network.
• ZIN is the total impedance of the input network. (4)
Figure 65. Non-Ideal TIA Layout Figure 66. Improved TIA Layout
27
OPA858
www.ti.com SBOS629A –APRIL 2018–REVISED JULY 2018
Product Folder Links: OPA858
Copyright © 2018, Texas Instruments Incorporated Submit Documentation Feedback
13 Device and Documentation Support
13.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.3 Trademarks
E2E is a trademark of Texas Instruments.
is a trademark of ~Microsoft Corporation.
13.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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